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The MC20002 is a high performance FPGA bridge IC that converts incoming LVDS high speed and incoming CMOS low speed data streams into a single lane MIPI D-PHY compliant output stream. The MC20002 can also convert a LVDS signal into a SLVS signal.
The MC20002 can be connected to any signal source, for example FPGAs or DSPs.
Data rates can be from 0 Mbps to 2.5 Gbps in HS (High Speed) mode and up to 20 Mbps in LPDT (Low Power Data Transmission) mode.
In MIPI D-PHY mode the THS-PREPARE timing can be controlled by the host device.

Key Features

  • Output is compliant to MIPI D-PHY interfaces using the DSI, CSI-1 and CSI-2 standards
  • HS mode data rate: up to a maximum of 2.5 Gbps
  • LPDT mode data rate: up to 20 Mbps
  • Flexible THS-PREPARE timing in MIPI D-PHY mode
  • Conversion of LVDS input to SLVS output
  • LVDS data rate: up to a maximum of 2.5 Gbps
  • No additional level shifters needed
  • Available as a QFN-16 package (VQFN-16-4)
  • 3mm * 3mm * 0.9mm, 0.5mm pitch
For more information, please contact us.